2008年3月19日 星期三

3/19 Meeting notes

  • The Integer Programming may be work , but still need consider for the length of edge.
  • May "Define a termenology" of each Partition stage
  • How to estimate the cost in each partition stage?
  • Finding Paper for Zero skew clock net
  • Could Find in IEEE with ICCAD DAC or TCAD TVLSI TC
  • Could ask for code or pattern from Paper writer
  • Remeber to register our account of workstation

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