The paper I study has nothing about partitioning.
Maybe we are the first team doing search like this. HAHAHAHA...
I think we must find more paper.
2008年3月25日 星期二
Email to paper author
Subject:
The question of paper :Zero skew clock net routing
Body:
Dear Yu-Chin:
We are junior student of National Chiao Tung University in Taiwan. Now our project we are studying is about the paper :Zero skew clock net routing.
We are wondering that if u could offer us the code or some implementation result of this paper.
It will be very appreciated if u could help us!
Thank you very much!
Sincerly , Fredy & Show from NCTU
Dear Yu-Chin:
We are junior student of National Chiao Tung University in Taiwan. Now our project we are studying is about the paper :Zero skew clock net routing.
We are wondering that if u could offer us the code or some implementation result of this paper.
It will be very appreciated if u could help us!
Thank you very much!
Sincerly , Fredy & Show from NCTU
2008年3月23日 星期日
2008年3月19日 星期三
3/19 Meeting notes
- The Integer Programming may be work , but still need consider for the length of edge.
- May "Define a termenology" of each Partition stage
- How to estimate the cost in each partition stage?
- Finding Paper for Zero skew clock net
- Could Find in IEEE with ICCAD DAC or TCAD TVLSI TC
- Could ask for code or pattern from Paper writer
- Remeber to register our account of workstation
訂閱：
意見 (Atom)